Download Product Brief approx 154.7K
|
Jennic’s SAR-CPE provides a high performance, efficient implementation of an ATM segmentation and re-assembly function for Customer Premises Equipment, particularly ADSL modems, routers and home gateways. The SAR-CPE is implemented as pre-configured compact hardware module, to enable rapid development of highly integrated System-on-Chip products for the consumer market. The hardware accelerator based architecture minimises the processing load and system power required to support ATM on a high throughput network link. The SAR-CPE will operate at full-duplex data rates of up to 155Mbps on a system clock speed as low as 40MHz. It can support AAL5 and AAL0 for all PDU types at full line-rate, with ‘per VC’ priority and traffic shaping for CBR, VBR and UBR service classes. The J-SAR-CPE is an implementation of Jennic’s Modular SAR product family, a range of highly configurable hardware ATM segmentation and re-assembly engines, which operate at full-duplex data rates of up to 622Mbps. The SAR architecture includes support for real-time data interfaces which bypass the host processor, for delivery of real-time data e.g. voice and video. These are mapped to ATM using the AAL2 and AAL1 protocol processors. Block Diagram |
||
Features
|
Benefits
Options
|
|